Since the early 1940's, digital computers have implemented the control functions of the computer in a variety of manners. On early machines, the instructions for arithmetic, Boolean operations, shifting, comparing, and looping were directly executed by hardware. Specific circuits existed for each instruction. As technology developed, it became difficult to isolate the circuits for each instruction. Different techniques were used to implement the control functions of such a computer. One such technique that provided a systematic and orderly approach to designing the control section of any computing system or processor was microprogramming.
Microprogramming is a technique used by designers to implement the control functions of a computer or processor by developing a set of microinstructions that map directly into hardware impulses. The concept of generating hardware impulses directly from computer instructions was originally conceived by M. V. Wilkes in 1951. Microprogrammable processors store "microprograms" (a set of microinstructions) in a memory, usually referred to as a "control store." Each microinstruction in a typical microprogrammable machine maps directly into hardware impulses that control the operation of the computer or processor.
Microprogramming has several advantages over conventional machines that hardwire control functions. First, the user can tailor the system containing the microprogrammable processor to the specific needs of his application. In addition, microprogrammable computers are easier to design and are conceptually simpler than hardwired computers.
Early microprogrammable systems used read-only memory ("ROM") to store the control microinstructions of the computer system. The next generation of microprogramming systems evolved around 1970 with the advent of fast PROMs (programmable read only memories). Later that decade, RAMs (random access read/write memory) were introduced which added flexibility and, in the long run, reduced cost. With the use of RAM that can be written to, it became unnecessary for a control store to contain all interpretations for each and every instruction for that machine. Rather, routines could be overlaid by loading different microprograms into control store.
A typical application for a microprogrammable processor or computer is to execute interpreters for other virtual machines. When operating as an interpreter, also known as an "emulator", the microprogrammable processor "emulates" other virtual machines. The level in which programs are being executed interpretively is called the target level. The level at which the interpreter (or microprogram) runs is called the host level. The host and target levels are always different levels of the same computer. The control store that stores the microprogram which provides control of a typical microprogrammable processor is physically distinct from the memory used by the target machines to store program and data. By using RAM for microprogram storage, a number of different target level machines may be emulated on the same host level machine. The microprogramming level, or host level, provides the basic microinstruction operations from which target machine instructions can be built. Typically, a user of a microprogrammable processor writes programs at the target level using a machine or assembly language, which in some cases may be more convenient and easier to use than microprogramming.
Since the early 1950's, two predominant computer architectures have existed for target level machines--the Harvard machine and the von Neumann architecture (also known as the "Princeton" architecture). The two architectures differ radically in one sense: the Harvard architecture separates memory into program memory and data memory, while the yon Neumann architecture uses the same memory for both instructions and data. The Harvard architecture is very powerful since severe bottlenecks can be avoided by having separate data and instruction memories. However, the yon Neumann architecture has the advantage of lower cost because only one memory array is required. Underlying both of these architectures in many machines is the concept of execution of instructions retrieved from a microprogrammable control store. Target level instructions are retrieved and executed from main memory by the execution of microprograms stored in a control store. Furthermore, underlying many von Neumann target level machines is an internal Harvard architecture at the host level. In these machines, a separate memory is required for the microprogram microinstructions and the microprogram data.
Recent advances in RAM technology in terms of speed, density, and price have made it even more advantageous to use RAM versus ROM for control store implementation. However, since microprogramming implies that the target memory and host memory are separate, any RAM space not used for storage of microprogram instructions may not be used for any other function. The potential exists that an enormous waste of memory resources may occur in a microprogrammable system.
Therefore, applicant has perceived a need for a microprogrammable processor that takes advantage of extra control store resources as fast external data memory. More specifically, applicant has seen a need for a processor that reconciles the concept of avon Neumann-type host machine that has the ability to share control store as fast data memory and an internal Harvard bus architecture that allows simultaneous access to microinstructions and data stored in the same memory.